This invention relates in general to integrated circuit ("IC") packaging techniques and in particular, to a method of constructing termination electrodes on yielded semiconductor die.
Tape Automated Bonding ("TAB") is an effective and established means of reliably forming high density packaging. The TAB method uses a thermal bonding technique to bond inner leads formed on a film carrier to bumps typically formed on the bond pads of an integrated circuit ("IC") chip.
A critical process and a key element in the successful use of TAB is proper formation of the bumps which serve to not only electrically connect the film carrier leads to the IC bond pads, but also to mechanically connect them. Early efforts at forming bumps on the IC bond pads focused on conventional wafer processing techniques. See, e.g., Liu, T. S. et al, "A Review of Wafer Bumping for Tape Automated Bonding," Solid State Technology, March 1980.
Although wafer processing often provides certain economies of scale through the batch processing of die, wafer processing of bumps can be inordinately expensive and its cost can exceed those economies of scale when gold or other expensive, high purity material is used as the bump material. This is because wafer processing indiscriminately forms gold bumps on the bad die, as well as, the good die of the wafer. The processing of large ICs is especially expensive, because of the smaller number of gross die and the smaller percentage of good die on the wafer being processed.
TAB, however, was developed as a packaging and mounting technique for handling large ICs with a large number of input and output ("I/O") bond pads. Thus, as ICs get larger, making TAB more attractive, the wafer processing cost of placing gold or other expensive, high purity material bumps on the IC bond pads rises exponentially with yield loss.
Alternative approaches to bump fabrication by continuing to process the IC wafer have therefore been pursued. One such approach is to eliminate the requirement of bumping the IC in favor of bumping the leads on the film carrier. See, e.g., Hatada, Kenzo et al, "Bump Property for High Bondability and Reliability in Transferred Bump Tab Assembly Technology," IMC 1988 Proceedings, Tokyo, May 25-27, 1988.
Bumping the film carrier leads, however, can also be unduly expensive for high volume production requirements since only one set of leads, corresponding to only one IC, can be fabricated at a time. Thus, although this technique solves the problem of wasting gold or other expensive, high purity bump material on bad die, it loses the cost advantages due to economies of scale provided by a batch processing fabrication method wherein many die are processed together at the same time such as in wafer processing.